Comparative Analysis of 1-Bit Full Adder Designs

Abstract

A full adder circuit is one of the basic building blocks of a digital design. In general, it is made by CMOS technology. In the CMOS technology the basic full adder is built by 42 transistors. So, the transistor count is very high. The average power consumption and delay are very high. The decrease in the transistor count reduces the average power, delay and noise. In this article, the comparison in terms of power consumption of different types of one bit full adders is considered. This paper discusses the evolution of full adder circuits in terms of lesser power consumption, higher speed. Starting with the most basic 42 transistor full adder and then gradually studied full adders consisting of as less as 10 transistors. For the purpose of comparative analysis of 1-bit different adder designs, 45nm technology is used with TANNER EDA tool.