Design of Low Power Level Shifter for Multi Supply Voltage System Using MTCMOS

Abstract

In this paper, a low leakage multi-Vth level shifter is designed for robust voltage shifting from sub threshold to above threshold domain using MTCMOS technique and sleep transistor. MTCMOS is an effective circuit level technique that improves the performance and design by utilizing both low and high threshold voltage transistors. Leakage power dissipation has become a main concern for VLSI circuit designers. In this a "sleep transistor” approach is preferred which reduces the leakage power while saving exact logic state. The new low-power level shifter using sleep transistor compares with the previous work for different values of the lower supply voltage. When the circuits are individually analyzed for power consumption at 45nm and 90nm CMOS technology, the new level shifter offers significant power savings up to 78% as compared to the previous work. Alternatively, when the circuits are individually analyzed for the minimum propagation delay, speed is enhanced by up to 23% with our approach to the circuit. All the simulation results are based on 45nm and 90nm CMOS technology and simulated in Cadence tool.