Power Analysis on Asynchronous S-Box by Measurement and Evaluation

Abstract

This project illustrates the hardware implementation of a low-power asynchronous Advanced Encryption Standard substitution box (S-Box). It is capable of resistant to side channel attack (SCA). The asynchronous S-box is based on self-time logic referred to as null conventional logic (NCL). NCL supports for resistant to the side channel attack of SCA's such as clock free, dual – rail encoding and monotonic transitions. To implement both the synchronous and asynchronous S-Box design a specified Field Programmable Gate Array (FPGA) Board is used. The beneficial properties is difficult for an unauthorized person to decipher secret keys which is embed within the cryptographic circuit of FPGA board while comparing the resistant to SCA of proposed with existing DPA (Differential Power Analysis) and Correlation Power Analysis (CPA) are presented in the S-Box. The power measurement results showed that NCL S-Box had 22% - 26% lower total power consumption than the original and was effective against DPA and CPA attacks. The dual-rail encoding with the pre-charge method, spacers (or) return-to-zero protocols is frequently used in both the synchronous and asynchronous designs. SCA's explore the security information by monitoring the emitted outputs from physical cryptosystems. These outputs include execution timing, power consumption, electromagnetic leaks and thermal emanations or acoustic emanations. Accurate measurement and estimation of these outputs are the key points of a successful attack. The SCA's include simple power analysis (SPA), Differential Power Analysis (DPA), Collision attacks and leakage power analysis. Among these, DPA and CPA are the most popular and effective attack.