Implementation of Reconfigurable, Coding-Efficient All Digital RF-Transmitter

Abstract

A new reconfigurable, coding efficient digital RF-Transmitter Architecture has been designed. The current approach uses different pulse shaping techniques and flexible Digital frequency Synthesizer which effectively increases coding efficiency of the system. Here we mainly address two key limitations of the previous architectures, poor coding efficiency and lack of re-configurability. The current architecture combines a maximum coding efficiency and fully reconfigurable while maintaining the high flexibility inherent to the all-digital RF-transmitters. The RF output carrier signal operating at Mega Hertz frequency range is generated. The obtained results also show the feasibility and potential of using reconfigurable digital RF-Transmitter architecture on FPGA.