NEELAVATHI, S.; VIGNESWARI, M. Power and Delay Reduction Using D-Latch in Carry Select Adder. The International Journal of Science & Technoledge, [S. l.], v. 2, n. 2, 2014. Disponível em: http://internationaljournalcorner.com/index.php/theijst/article/view/128095. Acesso em: 30 jul. 2024.