DODDAMANI, M. L.; M., M. L. Design and Implementation of Optimized Floating Point Matrix Multiplier Based on FPGA. The International Journal of Science & Technoledge, [S. l.], v. 2, n. 4, 2014. Disponível em: http://internationaljournalcorner.com/index.php/theijst/article/view/138802. Acesso em: 7 jul. 2024.