Parameswari, S. N. Lalitha, and G. R. Mahendra Babu. “Efficient Design of VLSI Architecture for Error Correction by Using ML Decoder/Detector”. The International Journal of Science & Technoledge 2, no. 3 (March 31, 2014). Accessed July 17, 2024. http://internationaljournalcorner.com/index.php/theijst/article/view/138591.