Performance, Analysis and Comparison of 8 Bit Adders

Abstract

Adders are some of the most critical data path circuits requiring considerable design effort in order to squeeze out as much performance gain as possible. Various adder structures can be used to execute addition such as serial and parallel structures and most of researches have done research on the design of high-speed, low-area, or low-power adders. Adders like ripple carry adder, carry select adder, carry look ahead adder, carry skip adder, carry save adder, Kogge Stone Adder etc exist numerous adder implementations each with good attributes and some drawbacks. This paper focuses on the implementation and simulation of 8-bit ripple carry adder, carry look-ahead adder and Kogge stone adder based on Very High Speed Integrated Circuit Hardware Description Language (VHDL) and compared for their performance. Adders play a very important role in every application that involves digital processing or an embedded application, in this project the a set of different adders will be designed including Kogge stone adder (KSA), KSA is designed in such a way that it consumes less area and delay than the existing techniques, projects simulation will be done on Xilinx12.2 Design Suite and Modelsim Simulator 6.3f.